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'Machine Learning on FPGAs for a 50 Tbps system with microsecond latency, to enable discovery science at CERNs Large Hadron Collider', by Nikos Konstantinidis from UCL Physics and Astronomy Department
Speaker Bio
Nikos has been at UCL since 2002.
He has worked on the ATLAS experiment since 2000 and has made leading contributions in triggering, the real-time selection of interesting collision events, as well as in the ATLAS Higgs physics programme, in particular the search for pair-production of Higgs bosons, a rare process that has become the flagship of the LHC physics programme in recent times.
During 2013-23, he was the UCL ATLAS group leader and during 2016-18 he was the Principal Investigator of the ATLAS UK collaboration of 15 institutes. In 2016, he led the successful bid to STFC and established the first-ever CDT in Data Intensive Science, a programme running with great success until today, being its co-Director until 2023.
Abstract
The ATLAS detector at the LHC produces data at a rate 10x the world internet traffic!
One of the greatest challenges is to process some of these data at real-time and decide within micro-secs which collision events to process further and eventually record to permanent store.
In about five years time, the challenge will become bigger yet, when the High-Luminosity era of the LHC gets underway. To address this challenge, ATLAS is building a new, powerful triggering system, the Global Hardware Trigger, which is made of custom-designed ATCA cards including some of the most powerful FPGAs in the market.
Key for the success of Global is to develop and deploy on the FPGAs Machine Learning algorithms that are optimised for physics performances vs. FPGA resources vs latency. The UCL ATLAS team is heavily involved in this work and I will give some examples, as well as discussing the bigger picture for the ATLAS and LHC science programme over the next ~15+ years.
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